On-Chip Voltage Regulator Module (VRM) Effect on Power/Ground Noise and Jitter At High-Speed Output Buffer
On-chip voltage regulator module (VRM) for the reduction of power/ground noise on power distribution network (PDN) and jitter minimization at high-speed output buffer is introduced. The basic topology and optimized operation for on-chip VRM is analyzed. A PDN with on-chip VRM shows reduced power/ground noise through removing additional effects coming from package/PCB PDN. Also, when on-chip VRM is implemented on PDN of high-speed output buffers, jitter at output signal is lower. Improvements on PDN and jitter through on-chip VRM are shown and validated with SPICE simulation with 110nm CMOS technology library.
H. Kim et al., "On-Chip Voltage Regulator Module (VRM) Effect on Power/Ground Noise and Jitter At High-Speed Output Buffer," IEEE International Symposium on Electromagnetic Compatibility, pp. 75-80, Institute of Electrical and Electronics Engineers (IEEE), Aug 2014.
The definitive version is available at https://doi.org/10.1109/ISEMC.2014.6898946
2014 IEEE International Symposium on Electromagnetic Compatibility (2014: Aug. 4-8, Raleigh, NC)
Electrical and Computer Engineering
Center for High Performance Computing Research
Second Research Center/Lab
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
CMOS integrated circuits; Electric current regulators; Electric network analysis; Electromagnetic compatibility; Jitter; SPICE; Voltage regulators; CMOS technology; On-chip voltage regulator; Optimized operations; Output Buffer; Output signal; Power distribution network; power/ground noise; SPICE simulations; Integrated circuit interconnects
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