Title

On-Chip Voltage Regulator Module (VRM) Effect on Power/Ground Noise and Jitter At High-Speed Output Buffer

Abstract

On-chip voltage regulator module (VRM) for the reduction of power/ground noise on power distribution network (PDN) and jitter minimization at high-speed output buffer is introduced. The basic topology and optimized operation for on-chip VRM is analyzed. A PDN with on-chip VRM shows reduced power/ground noise through removing additional effects coming from package/PCB PDN. Also, when on-chip VRM is implemented on PDN of high-speed output buffers, jitter at output signal is lower. Improvements on PDN and jitter through on-chip VRM are shown and validated with SPICE simulation with 110nm CMOS technology library.

Meeting Name

2014 IEEE International Symposium on Electromagnetic Compatibility (2014: Aug. 4-8, Raleigh, NC)

Department(s)

Electrical and Computer Engineering

Research Center/Lab(s)

Center for High Performance Computing Research

Keywords and Phrases

CMOS integrated circuits; Electric current regulators; Electric network analysis; Electromagnetic compatibility; Jitter; SPICE; Voltage regulators; CMOS technology; On-chip voltage regulator; Optimized operations; Output Buffer; Output signal; Power distribution network; power/ground noise; SPICE simulations; Integrated circuit interconnects

International Standard Book Number (ISBN)

9781479955442

International Standard Serial Number (ISSN)

10774076

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2014 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.


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