Effect of Narrow Power Fills on PCB PDN Noise
The printed circuit board (PCB) power delivery network (PDN) performance has become critical with the reducing margins on power noise. This paper deals with a specific question about the size of the power area fill used to route the power current from the dc regulator to integrated circuit(IC), and also used for connecting to the decoupling capacitors. With increased PCB real estate costs, narrow power fills are required, which results in an increase in the connection inductance of decoupling capacitors. This paper uses a proven lumped circuit model extraction procedure, based on the first principle resonant cavity model, to demonstrate the effect of narrow and wide area fills used in typical PCB PDN designs. The frequency domain results thus obtained are used with typical IC current draw profiles to show the impact on the noise voltage developed at the IC. Some design guidelines and conclusions are drawn from these results.
K. Shringarpure et al., "Effect of Narrow Power Fills on PCB PDN Noise," IEEE International Symposium on Electromagnetic Compatibility, pp. 839-844, Institute of Electrical and Electronics Engineers (IEEE), Aug 2014.
The definitive version is available at https://doi.org/10.1109/ISEMC.2014.6899084
2014 IEEE International Symposium on Electromagnetic Compatibility (2014: Aug. 4-8, Raleigh, NC)
Electrical and Computer Engineering
Center for High Performance Computing Research
Second Research Center/Lab
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
Capacitors; Electric power transmission; Electromagnetic compatibility; Frequency domain analysis; Lumped parameter networks; Paper capacitors; Printed circuits; Decoupling capacitor; First principles; Frequency domains; Lumped circuit models; PDN noise; Power delivery network (PDN); Power Distribution Network Design; Printed circuit boards (PCB); Printed circuit boards; Narrow area fills
International Standard Serial Number (ISSN)
Article - Conference proceedings
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