Title

Conducted-Emission Modeling for a High-Speed ECL Clock Buffer

Abstract

Total voltage sources and Thevenin equivalent circuits are derived by measurements and simulations using IBIS models to characterize the conducted emissions from ICs. The constructed noise source model for a test IC is applied in systemlevel simulations and the calculated far field radiation is validated with measurements. The agreement between simulated and measured results demonstrates the effectiveness of the constructed model for characterizing the conducted emissions from an IC's I/O pins.

Meeting Name

2014 IEEE International Symposium on Electromagnetic Compatibility (2014: Aug. 4-8, Raleigh, NC)

Department(s)

Electrical and Computer Engineering

Research Center/Lab(s)

Center for High Performance Computing Research

Keywords and Phrases

Equivalent circuits; Clock buffer; Conducted emissions; Far-field radiation; Measured results; Noise source models; System level simulation; Thevenin equivalent circuit; Voltage source; Electromagnetic compatibility

International Standard Serial Number (ISSN)

10774076

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2014 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.


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