Modeling shared-via decoupling in a multi-layer structure using the CEMPIE approach
The CEMPIE approach, a circuit extraction technique based on a mixed-potential integral equation, has been applied to model multi-layer structures including power and signal layers. Power-bus noise mitigation effects due to a decoupling capacitor were studied for several cases with different spacing between the capacitor and an integrated circuit (IC). Modeling results indicate that the capacitor sharing a common via with the IC power/ground pins is superior; viz., it results in the lowest power-bus noise under similar conditions.
W. Cui et al., "Modeling shared-via decoupling in a multi-layer structure using the CEMPIE approach," 10th Topical Meeting on Electrical Performance of Electronics Packaging, Institute of Electrical and Electronics Engineers (IEEE), Oct 2001.
The definitive version is available at http://dx.doi.org/10.1109/EPEP.2001.967660
Electrical and Computer Engineering
Materials Science and Engineering
Keywords and Phrases
Circuit Simulation; Equivalent Circuits; High-Speed Integrated Circuits; Integrated Circuit Modelling; Integrated Circuit Noise; Power Supply Circuits
Library of Congress Subject Headings
Surface mount technology
Article - Conference proceedings
© 2001 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.