Title

Modeling shared-via decoupling in a multi-layer structure using the CEMPIE approach

Abstract

The CEMPIE approach, a circuit extraction technique based on a mixed-potential integral equation, has been applied to model multi-layer structures including power and signal layers. Power-bus noise mitigation effects due to a decoupling capacitor were studied for several cases with different spacing between the capacitor and an integrated circuit (IC). Modeling results indicate that the capacitor sharing a common via with the IC power/ground pins is superior; viz., it results in the lowest power-bus noise under similar conditions.

Department(s)

Electrical and Computer Engineering

Second Department

Materials Science and Engineering

Keywords and Phrases

Circuit Simulation; Equivalent Circuits; High-Speed Integrated Circuits; Integrated Circuit Modelling; Integrated Circuit Noise; Power Supply Circuits

Library of Congress Subject Headings

Integral equations
Surface mount technology

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2001 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.


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