Abstract

Power island structures are often employed for minimizing the propagation of high-frequency noise on DC power buses. The rationale is based on introducing a series impedance in the power plane to provide isolation of a noise source from the rest of the PCB design. The power island concept is investigated herein experimentally, to determine its noise mitigation attributes and limitations. A modeling approach that is suitable for arbitrary PCB island geometries including lumped SMT decoupling capacitors is also presented. The modeling and measurements indicate that island structures can achieve some degree of isolation under certain conditions.

Meeting Name

IEEE International Symposium on Electromagnetic Compatibility, 1999

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

CEMPIE; DC Power Bus Design; EMI; PCB Design; PCB Island Geometries; PCB Layout; RF Isolation; Capacitors; Electric Impedance; Electric Potential; High-Frequency Noise Propagation; Integral Equations; Island Structure; Lumped SMT Decoupling Capacitors; Measurements; Mixed Potential Integral Equation; Modeling Approach; Noise; Noise Mitigation Attributes; Noise Source Isolation; Power Islands; Power Plane; Printed Circuit Layout; Radiofrequency Interference; Series Impedance; Surface Mount Technology

Document Type

Article - Conference proceedings

Document Version

Final Version

File Type

text

Language(s)

English

Rights

© 1999 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

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