Abstract

This paper analyzes the performance of a quaternary logic circuit and its components. The multi-valued logic design consisting of two drivers and a transistor matrix is simulated using Mentor Graphic software. Functional operation of the circuit is shown and propagation delay and power consumption are determined. The design is dependent on the voltage values for the multi-valued logic. Three logic cases are investigated. The performance of the logic circuit as a quaternary difference calculator is described.

Meeting Name

IEEE Region 5 Conference, 2008

Department(s)

Electrical and Computer Engineering

Sponsor(s)

Savant LLC

Keywords and Phrases

Driver Circuits; Logic Design; Matrix Algebra; Multivalued Logic Circuits

Document Type

Article - Conference proceedings

Document Version

Final Version

File Type

text

Language(s)

English

Rights

© 2008 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

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