A circuit extraction tool (CEMPIE) has been developed based on the mixed-potential integral equation (MPIE) using a quasi-static approximation. A power-bus in a multi-layered PCB consisting of a pair of dedicated ground and power planes is studied using this tool. The distributed behavior of a power-bus is represented by a collection of passive circuit elements, which is valid up to several gigahertz. The decoupling performance of a power-bus due to its layer spacing and the dielectric constant is evaluated for simple test geometries. The impact of the relative distance between the noise source and the potential receiver is also studied. Novel structures such as a power island were studied in both thin and thick boards, and the decoupling performance due to the locations and values of the decoupling capacitors were also investigated.
H. Shi et al., "Modeling Multilayered PCB Power-Bus Designs using an MPIE Based Circuit Extraction Technique," Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (1998, Denver, CO), vol. 2, pp. 647-651, Institute of Electrical and Electronics Engineers (IEEE), Aug 1998.
The definitive version is available at http://dx.doi.org/10.1109/ISEMC.1998.750273
IEEE International Symposium on Electromagnetic Compatibility (1998: Aug. 24-28, Denver, CO)
Electrical and Computer Engineering
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
MPIE Based Circuit Extraction Technique; Circuit Analysis Computing; Circuit Extraction Tool; Decoupling Capacitors; Decoupling Performance; Dedicated Ground Planes; Dedicated Power Planes; Dielectric Constant; Equivalent Circuits; Integral Equations; Layer Spacing; Mixed-Potential Integral Equation; Multilayered PCB Power-Bus Designs; Noise Source; Passive Circuit Elements; Permittivity; Potential Receiver; Power Island; Power-Bus; Printed Circuit Design; Quasi-Static Approximation; Test Geometries
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