Local decoupling, i.e., placing decoupling capacitors sufficiently close to device power/ground pins in order to decrease the impedance of power bus at frequencies higher than the series resonant frequency, has been studied using a modeling approach, a hybrid lumped/distributed circuit model established and an expression to quantify the benefits of power bits noise mitigation due to local decoupling developed. In this work, a test board with a local decoupling capacitor was studied and the noise mitigation effect due to the capacitor placed adjacent to an input test port was measured. Closed-form expressions for self and mutual inductances of vias are developed, so that the noise mitigation effect can then be estimated using the previously developed expression. The difference between the estimates and measurements is approximately 1 dB, which demonstrates the application of these closed-form expressions in the PCB power bus designs. Shared-via decoupling, capacitors sharing vias with device power/ground pins, is also modeled as an extreme case of local decoupling.


Electrical and Computer Engineering

Keywords and Phrases

S-Parameters; Capacitance; Closed-Form Expressions; Decoupling Capacitors; Device Power/Ground Pins; Distributed Parameter Networks; Electromagnetic Compatibility; Electromagnetic Interference; Hybrid Lumped/Distributed Circuit Model; Inductance; Local Decoupling; Lumped Parameter Networks; Mutual Inductances; Noise Mitigation Effect; Power Bits Noise Mitigation; Power Supply Circuits; Printed Circuit Board Layer Stackup; Printed Circuit Design; Self Inductances; Shared-Via Decoupling

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Document Type

Article - Journal

Document Version

Final Version

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© 2002 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

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