Simultaneous switching noise (SSN) resulting from IC devices can result in significant power bus noise, as well as radiation problems. An approach for estimating the power bus noise spectrum is presented in this paper. The power bus noise caused by digital circuits injecting high-frequency noise onto the DC buses feeding digital devices is calculated. The transient current drawn by an IC device is modeled using the load current and the shoot-through current through the power dissipation capacitance. Modeling and experimental results for several digital chips are shown. The modeling agrees well with the experimental results.
J. Mao et al., "Estimating DC Power Bus Noise," Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (2002, Minneapolis, MN), vol. 2, pp. 1032-1036, Institute of Electrical and Electronics Engineers (IEEE), Aug 2002.
The definitive version is available at https://doi.org/10.1109/ISEMC.2002.1032838
IEEE International Symposium on Electromagnetic Compatibility (2002: Aug. 19-23, Minneapolis, MN)
Electrical and Computer Engineering
Keywords and Phrases
DC Power Bus Noise Estimation; EM Radiation Problems; EMC; EMI; IC Devices; Digital Chips; Digital Integrated Circuits; Electromagnetic Compatibility; Electromagnetic Interference; High-Frequency Noise; Load Current; Power Dissipation Capacitance; Power Integrated Circuits; Shoot-Through Current; Simultaneous Switching Noise; Switching Transients; Transient Current; Power-Bus Noise; Capacitance; Electric Currents; Electric Loads; Electric Power Systems; Electromagnetic Wave Interference; Integrated Circuits; Spectrum Analysis; Simultaneous Switching Noises (SSN); Spurious Signal Noise
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