Abstract

This paper presents a BIST design for CCD-based digital imaging system. Pixels on a CCD are notfreefrom defective orfaulty pixels due to numerous causes such as imperfectfabrication, excessive exposure to light, radiation, sensing element aging, and excessive mechanical shock, to mention a few. Today's high demandfor high resolution CCDs is dictating defectlfault- tolerance in such devices. Especially, traditional on-device BIST cannot be readily employed on the imaging devices such as CCD due to the unique requirement that no pixel can be utilized to repair or bypass a defect on any other pixels. Therefore, the BIST technique designed and simulated in this paper is a technique to test and repair the defects on pixels off the device, referred to as off-device tolerance. The basic idea was proposed in our previous work in [2] where the off-device defect/fault tolerance was investigated and a soft-testlrepair technique was theoretically proposed in order to demonstrate the efficiency and effectiveness in terms ofreliability, referred to as virtual yield. A Verilog-based design and simulation is provided to demonstrate the validity of the off-device soft-test/repair in terms of reliability (or virtual yield) enhancement and performance.

Meeting Name

2007 IEEE Instrumentation & Measurement Technology Conference IMTC 2007

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

BIST (Built-In Self-Test); CCD (Charge Coupled Device); Defect/Fault Tolerance; Soft-Test/Repair

Document Type

Article - Journal

Document Version

Final Version

File Type

text

Language(s)

English

Rights

© 2007 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

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