Abstract

Investigation of a dc power delivery network, consisting of a multilayer PCB using area fills for power and return, involves the distributed behavior of the power/ground planes and the parasitics associated with the lumped components mounted on it. Full-wave methods are often employed to study the power integrity problem. While full-wave methods can be accurate, they are time and memory consuming. The cavity model of a rectangular structure has previously been employed to efficiently analyze the simultaneous switching noise (SSN) in the power distribution network. However, a large number of modes in the cavity model are needed to accurately simulate the impedance associated with the vias, leading to computational inefficiency. A fast approach is detailed herein to accelerate calculation of the summation associated with the higher-order modes. Closed-form expressions for the parasitics associated with the interconnects of the decoupling capacitors are also introduced. Combining the fast calculation of the cavity models of regularly shaped planar circuits, a segmentation method, and closed-form expressions for the parasitics, an efficient approach is proposed herein to analyze an arbitrary shaped power distribution network. While it may take many hours for a full-wave method to do a single simulation, the proposed method can generally perform the simulation with good accuracy in several minutes. Another advantage of the proposed method is that a SPICE equivalent circuit of the power distribution network can be derived. This allows both frequency and transient responses to be done with SPICE simulation.

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

Cavity Resonators; SPICE Equivalent Circuit; SPICE Simulation; SSN; Cavity Models; Circuit Modeling; Closed-Form Expressions; Dc Power Delivery Network; Decoupling Capacitors; Distribution Networks; Equivalent Circuits; Full-Wave Methods; Inductance; Integrated Circuit Interconnections; Multilayer PCB; Parasitic Interconnect Inductances; Planar Circuits; Power Delivery Network Design; Power Distribution; Power Distribution Network; Power Integrity Problem; Power Supply Circuits; Power/Ground Planes; Segmentation Method; Simultaneous Switching Noise; Transient Responses

International Standard Serial Number (ISSN)

1521-3323

Document Type

Article - Journal

Document Version

Final Version

File Type

text

Language(s)

English

Rights

© 2006 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

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