Abstract

When the performances of the electronic technology increase (higher frequencies, more power, lover power supply, faster transistors, reduced chip dimensions), designing electronic equipment becomes more challenging for the electronic engineers. Signal and power integrity on board become of paramount importance. One of the main causes of board malfunctions and electromagnetic radiation is the simultaneous switching noise (SSN) due to the integrated circuits soldered on the board. The paper proposes two simple procedures to model the SSN, so to evaluate its effects in any point of the board.

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

Field Programmable Gate Arrays; Integrated Circuit Modelling; Integrated Circuit Noise

Document Type

Article - Conference proceedings

Document Version

Final Version

File Type

text

Language(s)

English

Rights

© 2006 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

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