Abstract

This paper introduces a Finite-Difference Time-Domain (FDTD) approach to modeling portions of Ball Grid Array (BGA) package interconnect circuits. A fullwave circuit model including vias, trace segments, and ground vias was generated, using a computer gridding tool, and fed into the FDTD (Taflove and Hagness, 2005) program. The simulated results were correlated with TDR measurements.

Meeting Name

IEEE 15th Topical Meeting Electrical Performance of Electronic Packaging (2006: Oct. 23-25, Scottsdale, AZ)

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

Ball Grid Arrays; Finite Difference Time Domain Analysis; Integrated Circuit Interconnections; Integrated Circuit Modelling; Electric Currents; Electronics Packaging; Networks (Circuits); Nonlinear Optics; (p,p,t) Measurements; Ball Grid Array (BGA) Packages; Circuit Modeling; Electrical Performances; Electronic Packaging; FDTD Modeling; Finite Difference Time Domain (FDTD-3D); Gridding; Interconnect Circuits; Large Scales; Simulated Results; Finite Difference Time Domain Method

International Standard Book Number (ISBN)

1424406684; 9781424406685

International Standard Serial Number (ISSN)

2165-4107; 2165-4115

Document Type

Article - Conference proceedings

Document Version

Final Version

File Type

text

Language(s)

English

Rights

© 2006 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

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