Noise on the DC power-bus attributed to device switching is among the primary sources of EMI and signal integrity problems. A mixed-potential integral equation formulation with circuit extraction approach is used to model the planar multi-layer power-bus geometry, which can also include arbitrary shaped power regions on multiple layers. Incorporating vertical discontinuities, e.g. decoupling capacitor interconnects, is a critical aspect of the modeling, and must be done properly since they are included as a lumped element model and not as a part of the MPIE formulation. Agreement with experimental results verifies the validity of the present approach

Meeting Name

IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging, 1998


Electrical and Computer Engineering

Keywords and Phrases

DC Power-Bus Noise; EMI; MPIE Formulation; Arbitrary Shaped Power Regions; Capacitors; Circuit Analysis Computing; Circuit Extraction; Circuit Extraction Formulation; Circuit Noise; Decoupling Capacitor Interconnects; Device Switching; Driver Circuits; Electric Field Integral Equations; Electromagnetic Interference; Lumped Element Model; Mixed-Potential Integral Equation; Modeling; Multilayer PCBs; Multiple Layers; Packaging; Planar Multi-Layer Power-Bus Geometry; Power-Bus Modeling; Printed Circuit Design; Signal Integrity; Vertical Discontinuities

Document Type

Article - Conference proceedings

Document Version

Final Version

File Type





© 1998 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.