Abstract

When a high-speed signal transits through a via that penetrates a plane pair, parallel-plane resonances can cause additional insertion loss for the signal. To eliminate this via-plane coupling, ground vias are added adjacent to the signal via. This paper discusses the impact of the ground vias as a function of the number of the ground vias, their locations, and the size of the plane pair. A block-by-block physics-based equivalent circuit modeling approach is used in the study. The underlying physics of the phenomenon and the design implications are also discussed in the paper.

Meeting Name

Electrical Performance of Electronic Packaging, 2008. IEEE-EPEP

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

Equivalent Circuits; Integrated Circuit Modeling; Printed Circuit Design

Document Type

Article - Conference proceedings

Document Version

Final Version

File Type

text

Language(s)

English

Rights

© 2008 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

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