Modeling and design of DC power buses in high-speed digital circuit designs

Author

Jun Fan, Missouri University of Science and TechnologyFollow

Abstract

“The concept of partial elements with normalized potential coefficients is developed for general media. A circuit extraction approach based on a mixed-potential integral equation formulation (CEMPIE) is further developed based on partial elements with normalized potential coefficients, to include vertical discontinuities and losses into the first principles formulation. The approach is used for various DC power bus modeling. SMT decoupling capacitor placement is studied by modeling various capacitor locations, and local decoupling effect is quantified as a function of capacitor/IC spacing and power/ground layer separation. A general procedure to extract lumped circuit models for interconnects in multi-layer substrates is developed based on a partial element equivalent circuit type method, and a physics-based circuit prototype. This procedure is further used for via inductance estimation for a DC power bus in a multi-layer substrate. Closed-form expressions for via self inductance are then derived as a function of power plane dimensions, via diameter, power/ground layer separation, and via location. The expressions can be used in practical designs for evaluating via inductance without the necessity of full-wave modeling, and, predicting power bus impedance as well as effective frequency range of decoupling capacitors”--Abstract, page iii.

Advisor(s)

Drewniak, James L.

Committee Member(s)

Hubing, Todd H.
Van Doren, Thomas, 1940-
DuBroff, Richard E.
Hale, Barbara N.
Shi, Hao

Department(s)

Electrical and Computer Engineering

Degree Name

Ph. D. in Electrical Engineering

Publisher

University of Missouri--Rolla

Publication Date

Fall 2000

Pagination

xii, 171 pages

Note about bibliography

Includes bibliographical references (pages 163-170).

Rights

© 2000 Jun Fan, All rights reserved.

Document Type

Dissertation - Restricted Access

File Type

text

Language

English

Thesis Number

T 7855

Print OCLC #

47146420

Link to Catalog Record

Electronic access to the full-text of this document is restricted to Missouri S&T users. Otherwise, request this publication directly from Missouri S&T Library or contact your local library.

Recommended Citation

Fan, Jun, "Modeling and design of DC power buses in high-speed digital circuit designs" (2000). Doctoral Dissertations. 1375.
https://scholarsmine.mst.edu/doctoral_dissertations/1375