Title

Mixed-Criticality Scheduling Upon Varying-Speed Processors

Abstract

A varying-speed processor is characterized by two execution speeds: a normal speed and a degraded speed. Under normal circumstances it will execute at its normal speed, conditions during run-time may cause it to execute more slowly (but no slower than at its degraded speed). The problem of executing an integrated workload, consisting of some more important components and some less important ones, upon such a varying-speed processor is considered. It is desired that all components execute correctly under normal circumstances, whereas the more important components should execute correctly (although the less important components need not) if the processor runs at any speed no slower than its specified degraded speed.

Meeting Name

IEEE 34th Real-Time Systems Symposium, RTSS 2013 (2013: Dec. 3-6, Vancouver, BC, Canada)

Department(s)

Computer Science

Keywords and Phrases

Optimal Scheduling; Mixed Criticality; Multiprocessor Scheduling; Varying Speed System

International Standard Book Number (ISBN)

978-147992007-5

International Standard Serial Number (ISSN)

10528725

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2013 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

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