Bounding Fault Detection Probabilities in Combinational Circuits
Abstract
This paper focuses on the problem of bounding fault detection probabilities in combinational circuits. Two algorithms, the complete cutting algorithm and the gate blocking algorithm, are presented that always produce true lower bounds on the detection probability of a fault. Both algorithms can be used to identify difficult-to-test faults and to quickly construct test sets for specific faults. Both algorithms have qualitative versions which provide insight into a circuit while avoiding arithmetic calculation. Both algorithms resulted from research in trying to determine the accuracy of the safety factor heuristic of Jacob Savir.
Recommended Citation
G. Markowsky, "Bounding Fault Detection Probabilities in Combinational Circuits," Journal of Electronic Testing, vol. 2, no. 4, pp. 315 - 323, Springer Verlag, Nov 1991.
The definitive version is available at https://doi.org/10.1007/BF00135227
Department(s)
Computer Science
Keywords and Phrases
Computer Programming--Algorithms; Probability; Bounding Probabilities; Safety Factor Heuristics; Logic Circuits; Combinatorial; detection probability; testing
International Standard Serial Number (ISSN)
0923-8174
Document Type
Article - Journal
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 1991 Springer Verlag, All rights reserved.
Publication Date
01 Nov 1991
