Soluble Hard Mask for Interlayer Dielectric Patterning
Described herein are embodiments of a method that includes forming a hard mask over an interlayer dielectric layer, patterning said hard mask, etching said interlayer dielectric layer, and removing said hard mask during a post-etch clean with a wet etchant having a selectivity to etch said hard mask at a greater rate than said interlayer dielectric layer.
M. Abdelrahman and M. A. Hussein, "Soluble Hard Mask for Interlayer Dielectric Patterning," Intel Corporation, Feb 2010.
Civil, Architectural and Environmental Engineering
Patent Application Number
US 7,659,196 B2
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